A 1.6-GHz Dual Modulus Prescaler Using the Extended True-Single-Phase-Clock CMOS Circuit Technique ( - Solid-State Circuits, IEEE Journal of

The implementation of a dual-modulus prescaler (divide by 128/129) using an extension of the true-single-phase-clock (TSPC) technique, the extended TSPC (E-TSPC), is presented. The E-TSPC [1], [2] consists of a set of composition rules for single-phase-clock circuits employing static, dynamic, latch, dataprecharged, and NMOS-like CMOS blocks. The composition rules, as well as the CMOS blocks, are described and discussed. The experimental results of the complete dual-modulus prescaler, implemented in a 0.8 m CMOS process, show a maximum 1.59 GHz operation rate at 5 V with 12.8 mW power consumption. They are compared with the results from other recent implementations showing that the proposed E-TSPC circuit can reach high speed with both smaller area and lower power consumption.